TOKYO, June 20, 2006 - NEC Corporation and NEC Electronics
Corporation have developed a 45 nanometer (nm) node CMOS basic
circuit module with the latest high performance Cu/low-k multilevel
interconnects. It has been confirmed that basic circuit operation
possesses high-speed 5GHz-clocked LSI operation potential at
low-voltage (0.9V), achieving doubled device integrity and 20
percent power savings compared to conventional 65nm-node LSIs.
The features of the technologies are as follows:
(1) The interconnect parasitic capacitance, which enlarges the
signal delay and the power consumption, has been decreased
thoroughly by a unique “seamless low-k stack structure” without any
high-k silica layers. The parasitic capacitance of 140nm-pitched
lines was reduced to the world’s lowest at 85fF/mm, with the
effective dielectric constant keff=2.9.
(2) A special self-organizing etch technology was implemented to
realize the 140nm-pitched DDI*1 (dual damascene interconnect) in
the seamless low-k stacks of carbon-rich, hexagonal-silica-based
SiOCH (molecular-pore-stacked (MPS) SiOCH*2 with k=2.45) on
silicon-rich SiOCH (k=2.7).
(3) The interconnect-loaded basic circuit of the 45nm-node CMOS
(gate length Lg=30nm) has been confirmed to achieve 5GHz operation
potentially at 0.9V due to keff =2.9.
The 45nm-node CMOS with the seamless low-k stack structure
realizes a high speed and low-power LSI device for use in
next-generation supercomputers with 5GHz-clocked operation and
next-generation network (NGN) servers.
Silicon LSI devices consist of CMOS transistors and multilevel
interconnects that connect the transistors. Device scaling has
resulted in an increase in integration density and operation speed.
The interconnect parasitic capacitance, however, is increased by
simple scaling, enlarging the power consumption and the signal
delay. Starting from the 90nm-node, low-k dielectric films have
been implemented into the multilayer interconnects to reduce the
parasitic capacitance. With further miniaturization of the
45nm-node, precise control of the critical dimension (CD) became
difficult in the low-k films patterned without any etching damages.
Unwillingly, rigid silica layers were incorporated in the low-k
film stacks, which had the unwanted effect of pushing the effective
dielectric constant keff.
To address this problem, NEC and NEC Electronics developed a
unique ”seamless low-k stack structure” without any high-k silica
layers. The parasitic capacitance of 140nm-pitched lines has been
reduced to the world’s lowest 85fF/mm, with an effective dielectric
constant of keff=2.9. Along with the low-k seamless stack, a
special self-organizing etching technology, which is highly
sensitive to the chemical composition and density of the low-k
films, was developed. Consequently, the interconnect-loaded basic
circuits of 45nm-node CMOS transistors with 30nm gate-length have
been successfully operated to confirm the feasibility of
5GHz-clocked LSI operation even with low power supply voltage such
as 0.9V.
NEC and NEC Electronics consider 45nm-LSI with high performance
interconnects and fine CMOS to be indispensable for low-power and
high speed information technology, and the companies will continue
to actively conduct R&D in this area to bring leading edge
devices to market.
The companies will present these technologies at the Symposium
on VLSI Technology, to be held at Honolulu, Hawaii from June 13 to
15.
*1 The DDI structure was created with Cu-filling simultaneously
in the interconnect line-trenches and the via-holes in the low-k
films. The low oxygen content (LOC) Cu-alloy, which was reported by
NEC at IEDM 2005, was utilized as the filled metals, achieving high
interconnect reliabilities.
*2 A unique hexagonal-silica-based, low-k dielectric film, which
was developed jointly by NEC and the MIRAI project (low-k) and
presented at 2005 Symposium of VLSI Technology, in Kyoto, Japan.
Hexagonal silica molecules with unsaturated and saturated
hydrocarbon side-chains were vaporized to introduce low-power
He-plasma. The unsaturated hydrocarbon is mainly activated by the
low energy electrons to deposit the plasma-polymerized SiOCH film
with the hexagonal molecular pores of 0.35nmf, which is almost
equal to the size of water molecules. No water absorption was
observed into the MPS-SiOCH films even in the high humidity
circumstance due to the ultra-tiny porous structure.
About NEC Corporation
NEC Corporation (NASDAQ: NIPNY) is one of the world's leading
providers of Internet, broadband network and enterprise business
solutions dedicated to meeting the specialized needs of its diverse
and global base of customers. NEC delivers tailored solutions in
the key fields of computer, networking and electron devices, by
integrating its technical strengths in IT and Networks, and by
providing advanced semiconductor solutions through NEC Electronics
Corporation. The NEC Group employs more than 140,000 people
worldwide and had net sales of approximately 4,825 billion yen
(approx. $41.2 billion) in the fiscal year ended March 2006.
For additional information, please visit the NEC home page
at:
http://www.nec.com
* Newsroom: http://www.nec.co.jp/press/en/
About NEC Electronics Corporation
NEC Electronics Corporation (TSE: 6723) specializes in
semiconductor products encompassing advanced technology solutions
for the high-end computing and broadband networking markets, system
solutions for the mobile handsets, PC peripherals, automotive and
digital consumer markets, and multi-market solutions for a wide
range of customer applications. NEC Electronics Corporation has 25
subsidiaries worldwide including NEC Electronics America, Inc.
(www.am.necel.com) and NEC Electronics (Europe) GmbH
(www.eu.necel.com).
For additional information about NEC Electronics worldwide,
visit www.necel.com.